dc.contributor.author |
Sinyavskii V. |
|
dc.contributor.author |
Manapov R. |
|
dc.date.accessioned |
2018-09-17T20:16:25Z |
|
dc.date.available |
2018-09-17T20:16:25Z |
|
dc.date.issued |
1998 |
|
dc.identifier.issn |
0020-4412 |
|
dc.identifier.uri |
https://dspace.kpfu.ru/xmlui/handle/net/133268 |
|
dc.description.abstract |
Based on the two-group RAM IC addressing principle, a multichannel (256 channels) sequential data accumulator applying KP537Pυ14A RAM IC with one-bit memory (4K × 1) is proposed. The channel capacity is 216-1, and the input pulse repetition frequency is up to 62 kHz. © 1998 MAHK Hayka/Interperiodica Publishing. |
|
dc.relation.ispartofseries |
Instruments and Experimental Techniques |
|
dc.title |
Multichannel sequential pulse accumulator with a two-group memory addressing |
|
dc.type |
Article |
|
dc.relation.ispartofseries-issue |
2 |
|
dc.relation.ispartofseries-volume |
41 |
|
dc.collection |
Публикации сотрудников КФУ |
|
dc.relation.startpage |
192 |
|
dc.source.id |
SCOPUS00204412-1998-41-2-SID27544495206 |
|