Test generator based on linear shift register

Abstract

The paper deals with the design of test generator reproducing given test on the basis of shift register with linear feedback. The method of generator construction is based on the ordering of test totalities and on algorithms of synthesis of minimal linear shift register. The use of the generator is efficient for circuits designed by means of scanning path methods, as in this case the input register of testing circuit can be applied for generator construction. Besides, testing circuit can be considered as combinational. It enables to extend initial test set and to process the totalities in arbitrary order.